Jitter-Conscious Bus Arbitration Scheme for Real-Time Systems

نویسندگان

  • Jong-Ho Roh
  • Minje Jun
  • Kwanhu Bang
  • Eui-Young Chung
چکیده

Jitter is the variation of latencies, when real-time Intellectual Properties (IPs) are accessing data from the data storages. It is a critical factor for such IPs from the Quality-of-Service (QoS) perspective. Jitter of a real-time IP can be measured by how frequently it experiences the underflows and overflows from its data queue in read mode and write mode, respectively. Such failures critically depend on the bus arbitration scheme which determines the bus acquisition order of IPs. The proposed idea allows IPs to inform the bus arbiter of the status of their data buffers when they assert bus requests. Such information helps the bus arbiter to determine the bus acquisition order while greatly reducing the jitter. The experimental results show that our method effectively eliminates the overflows and underflows of real-time IPs by dynamically preempting the jittercritical bus requests. key words: jitter, QoS, arbitration, queue, real-time

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

An Adaptive Dynamic and Real-time Guaranteed Arbitration Algorithm for SoC Bus Communication ⋆

In shared System-on-chip(SoC) bus systems, arbiters are mandatory to deal with bus contentions while providing a hard real-time guarantee. In this paper, we propose a shared bus arbitration algorithm, called adaptive dynamic and real-time guaranteed arbitration algorithm. It allows high bus utilization and proper bandwidth allocation while guaranteeing hard real-time requirements. Comparisons a...

متن کامل

Latency-Aware Bus Arbitration for Real-Time Embedded Systems

We present a latency-aware bus arbitration scheme for real-time embedded systems. Only a few works have addressed the quality of service (QoS) issue for traditional busses or interconnection network. They mostly aimed at minimizing the latencies of several master blocks, resulting in decreasing overall bandwidth and/or increasing the latencies of other master blocks. In our method, the optimiza...

متن کامل

Simulation of Multiprocessor Bus Systems for Real-time Applications

This paper discusses the principles of bus systems simulation for real-time applications. It uses a typical queuing model of a single bus with multiple processors, memories and I/O devices. The major criterion used in evaluation of real-time response is the bus access latency. An illustrative example of a VMEbus system with two arbitration protocols, round-robin and priority-based, for typical ...

متن کامل

A Bus Arbitration Scheme with an Efficient Utilization and Distribution

Computer designers utilize the recent huge advances in Very Large Scale Integration (VLSI) to place several processors on the same chip die to get Chip Multiprocessor (CMP). The shared bus is the most common media used to connect these processors with each other and with the shared resources. Distributing the shared bus among the contention processors represents a critical issue that affects ov...

متن کامل

A Proposed Bus Arbitration Scheme for Multimedia Workstations

The integration of video and audio into computers requires the support of continuous streams at the hardware level. This paper proposes a bus bandwidth management and access arbitration scheme for a multimedia workstation. It is assumed that a multimedia workstation consists of several specialized processing modules which are linked by a packet-switched bus. Using the proposed scheme, the bus c...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:
  • IEICE Transactions

دوره 92-A  شماره 

صفحات  -

تاریخ انتشار 2009